1. Field of the Invention
The present invention relates to a circuit, more particularly, a circuit including a corral for containing a protective coating and a method of making same.
2. Description of the Invention Background
Products, such as circuits, may be reverse engineered to determine their design and operation. For example, reverse engineering of a circuit may be performed by opening the package containing a circuit and viewing the components and interconnections that make up the circuit. To reverse engineer multiple layered circuits, the top layer of the circuit is viewed, then it is removed and the next later is viewed. That process may be repeated for each layer in the circuit. Layers may be viewed through a microscope or through the use of photography. Layers may be removed by a grinding process using a mild abrasive or through a chemical process.
Products, such as circuits, may be protected from reverse engineering by covering them with a protective coating to prevent reverse engineering. The protective coating is designed to conceal the circuit from visual inspection and to physically destroy the circuit if removed. The protective coating also prevents tampering with circuits and protects it from contaminants and outside forces that may damage the circuit, such as ultraviolet light and static electricity. Protective coatings come in many varieties, and the problems with the prior art generally apply to all such coatings.
Primers are often used in conjunction with coatings Primers may have many functions including possessing inherent protective qualities and being an agent that will adhere to the surface of the circuit and to which the coating will adhere. It is important that coatings properly adhere so that they remain in place where they can serve their required function. Most tamper resistant materials are intended to destroy the circuit when removed. Therefore, adherence of tamper resistant materials is particularly important.
Both coatings and processes for placing such coatings currently exist. Those coatings, however, often cause the circuits on which they are used to fail, and the processes for placing them are not efficient. One reason for circuit failure is that the distribution of the coating is not adequately controlled. For example, a common placement method is to manually dispense a liquid primer layer, cure the primer layer, manually dispense a liquid tamper resistant material, and cure the tamper resistant material. It is necessary for the primer and tamper resistant material to be placed in a substantial quantity in order to adequately cover and protect the circuit. Therefore, the primer and tamper resistant material flow across the circuit. The result is uneven coating of the active area of the circuit and reduced protection of lightly coated areas.
Additionally, when employing the prior art method, the wires and package must be attached to the circuit before the primer and tamper resistant coating are applied. That is because the primer and tamper resistant coating typically cover the bond pads, thereby preventing attachment to the bond pads at a later time.
Another disadvantage is that prior art leaves the circuit unprotected during much of its processing, including during dicing of circuits from the wafer, attachment of the circuit to the package, and bonding of wires to the circuit's bond pads. As a result, the prior art allows a significant risk that an unprotected circuit may be withdrawn and reverse engineered.
Another disadvantage to the prior art involves the risk to encryption codes, such as classified keys, which may be determined by examining an encrypted circuit prior to the application of the protective coating. Encryption typically requires access to the bond pads, so the prior art requires encryption to be performed prior to applying the protective coating. Therefore, such circuits are encoded prior to placement of the primer and tamper resistant coating, which may cover the bond pads, and remain unprotected until the protective coating is applied during packaging. As a result, greater security precautions are required to protect the circuit and encryption keys, thereby increasing the cost and potential for loss. The prior art also has an increased failure rate because classification keys can be erased or altered during the high temperature curing steps required after the application of the protective coating.
Another source of failure in the prior art is the wires attached to the circuit's bond pads. Unusually high failures are caused when the primer and protective coating harden during the curing process. The hardened primer and protective coating and high temperatures often break the contact between the wires and the bond pads.
Another disadvantage of the prior art is that the protective coating covering the bond pads prevents inspection of the bond pads after the circuit is completed. Because the bond pads cannot be inspected, it is more difficult to determine the cause of a failure. The protective coating also prevents defective wires arid contacts from being reworked. As a result, when a failure occurs in a circuit packaged in accordance with the prior art, the entire assembly must be discarded.
In addition, the prior art is not well suited for automated processing. For example, it is time consuming and cumbersome to load an automatic dispenser with individual circuits, as required by the prior art. In addition, prior art methods and devices require regular human interaction or additional machinery, such as a die picking apparatus. The benefit derived from an automated systems highly accurate placement of the material is also unrealized because the prior art allows the protective coating to flow onto the bond pads.
The problems associated with the prior art result in increased time spent manufacturing circuits and increased costs associated with component failure and additional security required for unprotected circuits. Accordingly, a need exists for a device and a method that will permit efficient placement of coatings on circuits, early in their manufacture, while permitting high yields of operable circuits.